24pin VSOP |
- AES3, IEC60958, S/PDIF, EIAJ CP1201 Compatible
- Low jitter Analog PLL
- PLL Lock Range : 32kHz to 192kHz
- Clock Source: PLL or X'tal
- 2-channel Receiver input
- Auxiliary digital input
- Detection Functions
Non-PCM Bit Stream Detection
DTS-CD Bit Stream Detection
Sampling Frequency Detection
(32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz,
192kHz)
Unlock & Parity Error Detection
Validity Flag Detection
- Up to 24bit Audio Data Format
- Audio I/F: Left justified, Right justified
(16bit, 18bit, 20bit, 24bit), I2S
- 40-bit Channel Status Buffer
- Burst Preamble bit Pc and Pd Buffer for
Non-PCM bit stream
- Q-subcode Buffer for CD bit stream
- 4-wire Serial µP I/F
- Master Clock Output: 128fs/256fs/512fs
- Operating Voltage: 2.7 to 3.6V
- Small Package: 24pin VSOP
- Ta: -40 to 85°C
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